The present invention relates, in general, to multi-chip semiconductor modules, and more particularly, to a multi-chip semiconductor module designed for thorough testability.
Multi-chip semiconductor modules are complex combinations of integrated circuit chips mounted on a one or more substrates. The integrated circuit chips are interconnected on the substrate by an conductive network formed on the substrate. Each of the integrated circuits has a plurality of contact pads formed thereon, and some of these contact pads are coupled to leads which extend from the package. The substrate, integrated circuit chips, and leads form a single package which can perform functions vastly more complex than a single integrated circuit chip. Moreover, because the integrated circuit chips are mounted to a single substrate, the entire assembly is very space efficient, requiring less board space in an apparatus using the multi-chip semiconductor module.
Reliability of multi-chip modules is very important to manufacturers and users. Complete functional testing of the integrated circuits used, particularly high speed testing and testing after burn-in are fundamental techniques to ensure reliability. It is particularly difficult to test multi-chip modules because only some of the contact pads of the integrated circuits can be coupled to an external tester by way of leads which extend from the package. Testing is further complicated by the fact that it is difficult or impossible to test the integrated circuit chips fully before they are mounted to the substrate. Moreover, once the individual integrated circuit chips are connected to each other, their characteristics are modified; parasitics created by the interconnection become difficult, if not impossible, to measure. Testing is particularly difficult at high speeds. Thus, functionality of the integrated circuit chips inside the multi-chip module cannot be completely tested because there is no way to couple a tester to individual contact pads on the integrated circuits.
What is needed is a multi-chip module designed for testability and a method for making and testing such a multi-chip module.